irfd9020 www.vishay.com vishay siliconix s16-1506-rev. d, 01-aug-16 1 document number: 90170 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 power mosfet features ? dynamic dv/dt rating ? repetitive avalanche rated ? for automatic insertion ? end stackable ?p-channel ? 175 c operating temperature ? fast switching ? material categorization: fo r definitions of compliance please see www.vishay.com/doc?99912 description third generation power mosfet s from vishay provides the designer with the best combi nation of fast switching, ruggedized device design, lo w on-resistance and cost effectiveness. ? the 4 pin dip package is a low cost machine-insertable case style which can be stacked in multiple combinations on standard 0.1" pin centers. the du al drain serves as a thermal link to the mounting surface fo r power dissipation levels up to 1 w. notes a. repetitive rating; pulse widt h limited by maximum junction temperature (see fig. 11). b. v dd = -25 v, starting t j = 25 c, l = 15 mh, r g = 25 ? , i as = -3.2 a (see fig. 12). c. i sd ? -11 a, di/dt ? -140 a/ms, v dd ? v ds , t j ? 175 c. d. 1.6 mm from case. product summary v ds (v) -60 r ds(on) ( ? )v gs = -10 v 0.28 q g max. (nc) 19 q gs (nc) 5.4 q gd (nc) 11 configuration single s g d p-channel mo s fet hvmdip d s g ordering information package hvmdip lead (pb)-free irfd9020pbf absolute maximum ratings (t a = 25 c, unless otherwise noted) parameter symbol limit unit drain-source voltage v ds -60 v gate-source voltage v gs 20 continuous drain current v gs at -10 v t a = 25 c i d -1.6 a t a = 100 c -1.1 pulsed drain current a i dm -13 linear derating factor 0.0083 w/c single pulse avalanche energy b e as 140 mj repetitive avalanche current a i ar -1.6 a repetitive avalanche energy a e ar 0.13 mj maximum power dissipation t a = 25 c p d 1.3 w peak diode recovery dv/dt c dv/dt -4.5 v/ns operating junction and storage temperature range t j , t stg -55 to +175 c soldering recommendations (peak temperature) d for 10 s 300
irfd9020 www.vishay.com vishay siliconix s16-1506-rev. d, 01-aug-16 2 document number: 90170 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes a. repetitive rating; pulse widt h limited by maximum junction temperature (see fig. 11). b. pulse width ? 300 s; duty cycle ? 2 %. thermal resistance ratings parameter symbol typ. max. unit maximum junction-to-ambient r thja -120c/w specifications (t j = 25 c, unless otherwise noted) parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = - 250 a -60 - - v v ds temperature coefficient ? v ds /t j reference to 25 c, i d = -1 ma - - 0.056 - v/c gate-source threshold voltage v gs(th) v ds = v gs , i d = -1 a -2.0 - -4.0 v gate-source leakage i gss v gs = ?? 20 - - ?? 100 na zero gate voltage drain current i dss v ds = -60 v, v gs = 0 v - - - 100 a v ds = -48 v, v gs = 0 v, t j = 150 c - - - 500 drain-source on-sta te resistance r ds(on) v gs = -10 v i d = - 0.96 a b - - 0.28 ? forward transconductance g fs v ds = -25 v, i d = - 0.96 a b 1.3 - - s dynamic input capacitance c iss v gs = 0 v, v ds = -25 v, f = 1.0 mhz, see fig. 5 -570- pf output capacitance c oss -360- reverse transfer capacitance c rss -65- total gate charge q g v gs = -10 v i d = - 11 a, v ds = -48 v, see fig. 6 and 13 b --19 nc gate-source charge q gs --5.4 gate-drain charge q gd --11 turn-on delay time t d(on) v dd = - 30 v, i d = -11 a, r g = 18 ? , r d = 2.5 ?? , see fig. 10 b -13- ns rise time t r -68- turn-off delay time t d(off) -15- fall time t f -29- internal drain inductance l d between lead, ? 6 mm (0.25") from package and center of die contact -4.0- nh internal source inductance l s -6.0- drain-source body diode characteristics continuous source-drain diode current i s mosfet symbol showing the ? integral reverse ? p - n junction diode --- 1.6 a pulsed diode forward current a i sm --- 13 body diode voltage v sd t j = 25 c, i s = -1.6 a, v gs = 0 v b --- 6.3v body diode reverse recovery time t rr t j = 25 c, i f = - 11a, di/dt = 100 a/s b - 100 200 ns body diode reverse recovery charge q rr - 0.32 0.64 c forward turn-on time t on intrinsic turn-on time is negligib le (turn-on is dominated by l s and l d ) d s g s d g
irfd9020 www.vishay.com vishay siliconix s16-1506-rev. d, 01-aug-16 3 document number: 90170 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) fig. 1 - typical output characteristics, t a = 25 c fig. 2 - typical output characteristics, t a = 175 c fig. 3 - typical transfer characteristics fig. 4 - normalized on-resistance vs. temperature t a = 25 c t a = 175 c
irfd9020 www.vishay.com vishay siliconix s16-1506-rev. d, 01-aug-16 4 document number: 90170 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 5 - typical capacitance vs. drain-to-source voltage fig. 6 - typical gate charge vs. gate-to-source voltage fig. 7 - typical source-d rain diode forward voltage fig. 8 - maximum safe operating area t a = 25 c t j = 150 c s in g le pul s e
irfd9020 www.vishay.com vishay siliconix s16-1506-rev. d, 01-aug-16 5 document number: 90170 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 9 - maximum drain curre nt vs. ambient temperature fig. 10a - switching time test circuit fig. 10b - switch ing time waveforms fig. 11 - maximum effective transient thermal impedance, junction-to-ambient fig. 12a - unclamped inductive test circuit fig. 12b - unclamped inductive waveforms t a , ambient temperature (c) -i d , drain current (a) pulse width 1 s duty factor 0.1 % r d v gs r g d.u.t. - 10 v + - v ds v dd v gs 10 % 90 % v ds t d(on) t r t d(off) t f thermal response (z thja ) t 1 , rectangular pulse duration (s) r g i as 0.01 t p d.u.t. l v ds + - v dd - 10 v var y t p to obtain required i as i as v ds v dd v ds t p
irfd9020 www.vishay.com vishay siliconix s16-1506-rev. d, 01-aug-16 6 document number: 90170 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 12c - maximum avalanche energy vs. drain current fig. 13a - basic gate charge waveform fig. 13b - gate charge test circuit q gs q gd q g v g charge - 10 v d.u.t. - 3 ma v gs v ds i g i d 0.3 f 0.2 f 50 k 12 v current regulator current sampling resistors same type as d.u.t. + -
irfd9020 www.vishay.com vishay siliconix s16-1506-rev. d, 01-aug-16 7 document number: 90170 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 14 - for p-channel ? ? ? ? ? ? ? ? ? vishay siliconix maintains worldw ide manufacturing ca pability. products may be manufactured at one of several qualified locatio ns. reliability da ta for silicon technology and package reliability represent a composite of all qu alified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?90170 . p.w. period di/dt diode recovery dv/dt body diode forward drop body diode forward current driver gate drive inductor current d = p.w. period + - - - - + + + peak dio d e recovery d v/ d t test circuit ? dv/dt controlled by r g ? d.u.t. - device under te s t d.u.t. circuit layout con s ideration s ? low stray inductance ? g round plane ? low leakage inductance current tran s former r g ? compliment n-channel of d.u.t. for driver v dd ? i s d controlled by duty factor d note note a. v gs = - 5 v for logic level and - 3 v drive device s v gs = - 10 v a d.u.t. l s d waveform d.u.t. v d s waveform v dd re-applied voltage ripple 5 % i s d rever s e recovery current
document number: 91361 www.vishay.com revision: 06-sep-10 1 package information vishay siliconix hvm dip (high voltage) note 1. package length does not include mold flash, protrusions or gate burrs. package width does not include interlead flash or prot rusions. inches millimeters dim. min. max. min. max. a 0.310 0.330 7.87 8.38 e 0.300 0.425 7.62 10.79 l 0.270 0.290 6.86 7.36 ecn: x10-0386-rev. b, 06-sep-10 dwg: 5974 0.248 [6.29] 0.240 [6.10] 0.197 [5.00] 0.189 [4.80] 0.024 [0.60] 0.020 [0.51] 0.160 [4.06] 0.140 [3.56] 0.180 [4.57] 0.160 [4.06] 4 x 0.100 [2.54] typ. a l 0.045 [1.14] 0.035 [0.89] 2 x 0.043 [1.09] 0.035 [0.89] 0.094 [2.38] 0.086 [2.18] 0.017 [0.43] 0.013 [0.33] 0 to 15 2 x e min. e max. 0.133 [3.37] 0.125 [3.18]
legal disclaimer notice www.vishay.com vishay revision: 08-feb-17 1 document number: 91000 disclaimer ? all product, product specifications and data ar e subject to change with out notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employee s, and all persons acting on it s or their behalf (collectivel y, vishay), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, representation or guarantee regarding the suitability of th e products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicable law, vi shay disclaims (i) any and all liability arising out of the application or use of any product , (ii) any and all liability, including without limitation specia l, consequential or incidental damages, and (iii) any and all implied warranties, includ ing warranties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of products for certain types of applicatio ns are based on vishays knowledge of typical requirements that are often placed on vishay products in generic applications. such statements are not binding statements about the suitability of products for a particular applic ation. it is the customers responsibility to validate tha t a particular product with the prope rties described in the product sp ecification is suitable for use in a particular application. parameters provided in datasheets and / or specifications may vary in different ap plications and perfor mance may vary over time. all operating parameters, including ty pical parameters, must be va lidated for each customer application by the customer s technical experts. product specifications do not expand or otherwise modify vishays term s and conditions of purchase, including but not limited to the warranty expressed therein. except as expressly indicated in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vishay product could result in personal injury or death. customers using or selling vishay product s not expressly indicated for use in such applications do so at their own risk. please contact authorized vishay personnel to obtain writ ten terms and conditions rega rding products designed for such applications. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is gran ted by this document or by any conduct of vishay. product names and markings noted herein may be trademarks of their respective owners. ? 2017 vishay intertechnology, inc. all rights reserved
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